[cfarm-users] Beta RISC-V host with Vector extension (BananaPi BPI-F3 / SpacemiT K1)

James Cloos cloos at jhcloos.com
Sat Sep 28 17:40:29 CEST 2024


cool to have in the farm!

Based on what I could find online it looks like, at least for gcc, that
gcc -march=rv64gcv_zvl256b is the correct option for testing vector.

running gcc -march=rv64gcv_zvl256b -dM -E /usr/inclode/math.h|sort adds
these DEFINEs to what one gets w/o -mcpu:

--- none	2024-09-28 15:27:17.778945752 +0000
+++ native	2024-09-28 15:30:18.981918973 +0000
@@ -877,0 +878,6 @@
+#define __riscv_v 1000000
+#define __riscv_v_elen 64
+#define __riscv_v_elen_fp 64
+#define __riscv_v_intrinsic 12000
+#define __riscv_v_min_vlen 256
+#define __riscv_vector 1
@@ -880,0 +887,9 @@
+#define __riscv_zve32f 1000000
+#define __riscv_zve32x 1000000
+#define __riscv_zve64d 1000000
+#define __riscv_zve64f 1000000
+#define __riscv_zve64x 1000000
+#define __riscv_zvl128b 1000000
+#define __riscv_zvl256b 1000000
+#define __riscv_zvl32b 1000000
+#define __riscv_zvl64b 1000000

it will be interesting to discover how much of benefit vector provides 
most code on real hardware.

-JimC
-- 
James Cloos <cloos at jhcloos.com>
            OpenPGP: https://jhcloos.com/0x997A9F17ED7DAEA6.asc


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