[cfarm-users] cfarm95: RISC-V host with RVV 1.0 vector extension
Andy Polyakov
appro at cryptogams.org
Sat Oct 5 19:06:43 CEST 2024
>>> We are happy to announce the addition of cfarm95, a BPI-F3 machine
>>> from BananaPi. This RISC-V machine is based on a SpacemiT K1 SoC
>>> with 8 SpacemiT X60 cores. The most interesting feature of this
>>> hardware is its implementation of the RVV 1.0 vector extension;
>>
>> Cool! There is a problem though. If an asynchronous signal, e.g. SIGALRM, is
>> delivered to a thread that is executing vector instruction the application
>> crashes with SIGILL. I assume that return-from-signal code path doesn't
>> restore some processor state bit. Just in case anybody runs into it...
>
> Interesting! Do you think the issue comes from the compiler, from the
> libc, or from the kernel? Which compiler are you using?
As implied I blame the kernel. I naturally might be wrong, but I base
the conclusion on the assumption that relevant processor state bits
ought to be privileged(*) and ultimately it's the kernel that reigns
over that. It can't be a compiler issue, because I write in assembly.
Just in case for reference, on a practical note. If I execute under
debugger, the crashing instruction is always different. Well, it has to
be a vector one, but other than that it's just random.
Cheers.
(*) If they're not, then applications would be able to spy on each
other's vector register contents, which may not be the case.
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